About Me
Contact
joemacd117@hotmail.com
Work Experience
Intern Design Engineer - STMicroelectronics
June 2022 - Present (MEng Placement in Progress)
Working with the Special Projects Team for Technology for Optical Sensors within the Imaging division. Primarily designing schematics and IC layouts for simulation and implementation within the Cadence Virtuoso, currently engaged in ultra-low power energy harvesting applications with a particular focus on analogue electronics and IC layout design.
Education
MEng Electrical and Electronic Engineering (Heriot-Watt University)
Final Year in Progress - Graduation June 2024
First Class Average (76%) - UKESF Scholarship
Other Pursuits
HWRACING Formula Student - Powertrain Division
September 2022 - May 2023
Design of a Distributed Accumulator Temperature Monitoring (DATM) system for a Formula Student tractive system accumulator
Co-authored “Self-Powered Ambient Light Sensor Using Energy Harvesting Pixels and Zero Power Communication” Conference Paper at IISW 2023, Crieff, Scotland
Other Skills
Cadence Virtuoso Suite - Layout Design, Schematic Design, PVT, Eldo/Spectre
UNIX and LINUX familiarity
C, Python and MATLAB Familiarity
Experienced with STM32 MCU development and STM32CubeIDE
CAD/3D Printing